AS5013-IQFT-1000【PDF 10/32 页】IC ENCODER HALL SENSOR 16-QFN

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www.ams.com/AS5013

Revision 1.11

10 - 32

AS5013

Datasheet - Detailed Description

7.5 I睠 Interface

The AS5013 supports the 2-wire high-speed I睠 protocol in device mode, according to the NXP specification UM10204.

The host MCU (master) has to initiate the data transfers. The 7-bit device address of the AS5013 depends on the state at the pin ADDR.

ADDR = 0 ?Slave address =1000 000 (40h)

ADDR = 1 ?Slave address =1000 001 (41h)

For other I睠 addresses, please contact ams.

Supported modes (slave mode):

n Random/Sequential Read

n Byte/Page Write

n Standard Mode: 0 to 100kHz clock frequency

n Fast Mode: 0 to 400kHz clock frequency

n High Speed: 0 to 3.4MHz clock frequency

The SDA signal is bidirectional and is used to read and write the serial data. The SCL signal is the clock generated by the host MCU, to

synchronize the SDA data in read and write mode. The maximum I睠 clock frequency is 3.4MHz, data are triggered on the rising edge of SCL.

7.5.1 Interface Operation

Figure 8. I睠 Timing Diagram for FS-mode

Figure 9. Timing Diagram for HS-mode

Start

Stop

BUF

LOW

HD.STA

tHIGH

SU.DAT

SU.STA

tHD.STA

SU.STO

Repeated

Start

tHD.DAT

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